Current semiconductor processing typically comprises forming an integrated circuit containing a plurality of conductive patterns on vertically stacked levels connected by vias and insulated by inter-layer dielectrics. As device geometries plunge into the deep sub-micron range, chips comprising five or more levels of metalization are formed.
In manufacturing multi-level semiconductor devices, it is necessary to form each level with a high degree surface planarity, avoiding surface topography, such as bumps or areas of unequal elevation, i.e., surface irregularities. In printing photolithographic patterns having reduced geometries dictated by the increasing demands for miniturzation, a shallow depth of focus is required. The presence of surface irregularities can exceed the depth of focus limitations of conventional photolithographic equipment. Accordingly, it is essential to provide flat planar surfaces in forming the various levels of a semiconductor device. Thus, in order to maintain acceptable yield and device performance, conventional semiconductor methodology involves some type of planarization or leveling technique at suitable points in the manufacturing process.
A conventional planarization technique for eliminating or substantially reducing surface irregularities is CMP, which typically involves holding and/or rotating a wafer against a rotating polishing platen covered with a polishing pad under a controlled pressure. The polishing pad is employed together with a chemical polishing slurry to polish, i.e., remove material from the wafer surface. Conventional polishing pads which interface with the wafer include open cell foamed polyurethane, such as Rodel IC 1000, or a sheet of polyurethane with a grooved surface, such as Rodel EX 2,000. A factor affecting high and stable CMP rates is pad conditioning, a technique for bringing the polishing pad surface into proper form for actual CMP. Polishing pads must be preconditioned before initial actual use as well as periodically conditioned after actual use in CMP to restore the rough surface texture for repeatable removal rates.
Conventional preconditioning to prepare the polishing pad for initial CMP use is effected by various techniques. One such technique involves cutting circumferential grooves into the polishing pad surface to channel slurry between the substrate surface and the pad. Such grooves are formed prior to polishing by means of a milling machine, a lathe or a press. Such preconditioning techniques are problematic in that ridges forming the grooves are worn down after repeated polishing cycles, and the smoothed out polishing surface results in a reduction of slurry delivery beneath the substrate surface. This type of degradation in pad roughness occurs over time and results in low, unstable and unpredictable polish rates.
Another conventional technique comprises preconditioning a polishing pad with a diamond conditioning disk. This preconditioning technique is also problematic in that dislodged diamonds from the disk retained by the polishing pad mix in with the polishing slurry and scratch the wafer surface. In addition, diamond conditioning disks must eventually be discarded once the diamonds are dislodged from the surface.
Another conventional preconditioning technique comprises polishing dummy or blanket wafers. This preconditioning technique typically comprises polishing a dummy blank wafer having a silicon oxide surface, i.e., silicon dioxide, with the polishing pad in a CMP apparatus to prepare the polishing pad for actual CMP use on production wafers. After removal of a few microns of the silicon dioxide surface, the polishing pad is sufficiently preconditioned for actual CMP use. This type of preconditioning using dummy or blanket wafers is conducted with a slurry, e.g., a silicon dioxide or alumina slurry, and can be employed in combination with the diamond disk preconditioning technique. However, preconditioning with dummy or blanket wafers is extremely time consuming, requiring at least 30 minutes to complete, and is extremely expensive in consuming numerous wafers, e.g., about ten wafers.
Mullins, in U.S. Pat. No. 5,527,424 discloses the disadvantages of various conventional preconditioning techniques. The invention disclosed by Mullins comprises a preconditioning plate having at least three intersecting radial ridges.
There exists a need for polishing pad preconditioning methodology which is efficient, cost effective and rapid. There also exists a need for an apparatus for preconditioning a polishing pad in an efficient, rapid and cost effective manner.